Access to RTL design and verification  proprietary software is very complicated for small design houses such as ours. And while there are open alternatives such as Icarus Verilog and Verilator, they can only take you so far in terms of SystemVerilog RTL design. Because when the rubber hits the road, you need strong methodologies like UVM for real chips (and certainly no one is going to hire a budding team of DVs if no UVM expertise is shown). How can you leverage your team’s expertise in IC verification when no open UVM-fully-compliant alternatives exist (see our own recent posts on Verilator)? 

The sad truth is that, even if you had the money to pay for the seats (which by itself is no small feat), EDA companies simply may not answer your requests for a quotation (as has repeatedly been the case for us). That’s when a small company from Canada came to the rescue. Metrics (https://www.metrics.ca/) offers a cloud-based SaaS solution for System Verilog and VHDL verification called DSim, that up until this post, includes the possibility of a perpetual free desktop license (as Metrics has been recently acquired by Altair, we unfortunately don’t know if this offer will continue for long, nor if prices for the cloud-based service will still be competitive). 

The good news is that we have been testing this desktop simulator in several of our internal designs, including our RISC-V cores and our AMBA-based interfaces, and we can attest that, as of now, the tool is completely UVM compliant and that support from Metrics has been excellent.

If you’re a freelance designer, or even part of a small design team looking for an affordable simulation framework, not expensive in terms of licensing or computational resources, don’t think twice and give DSim a try. 

You can find a small tutorial here: