Reliability and performance in real applications.
This ultra-low-power microcontroller supports the 32RVI RISC-V standard, offering a compact and efficient solution for embedded applications.
Ultra-Compact RISC-V 32RVI compatible low-power microcontroller
- Fully tested on a HV CMOS 0.18 um commercial process
- Dual and single core multicycle IP solutions (less than 32k gates per core)
- SPI, Bootstrap, UART and SRAM memory controllers.
- Full instruction-set implementation (32RVI 32-bit base integer) with custom special GPIO instructions.
- A configurable clock-gated 32-bit bus manager that facilitates power management and integration of other IP blocks to the RISC-V core.
- HV CMOS GPIO. Our special HV ports can directly manage HV loads (up to 15 V)
SIWA is a licensed product, designed in collaboration with Tecnológico de Costa Rica
Compact and Flexible RISC-V Solutions for Ultra Low Power Applications
SIWA is our line of compact, RISC-V solutions aimed at ultra low power applications (48.31 pJ/cycle @1MHz per core on 0.18 um commercial process for the multicycle version). SIWA is capable of replacing 8 and 16-bit microcontroller solutions while being flexible and expandable to 32-bits, maintaining complete compatibility to RISC-V open-source toolchains
- Ultra-Compact
- Low-Power Expandable
Superior in an ultra-compact design
Designed to support RISC-V 32RVI, this low-power microcontroller is ideal for compact and efficient systems.
Ultra-Compact RISC-V 32RVI compatible 5-stages pipelined microcontroller
- Being tested on HV CMOS 0.18 um and 65 nm CMOS processes.
- Single core 5-stages pipelined IP solution for higher performance.
- Internal interrupt manager.
- SPI, Bootstrap, UART and SRAM memory controllers.
- Full instruction-set implementation (32RVI 32-bit base integer) with custom special GPIO instructions.
- IP is capable of replacing 8 and 16-bit microcontroller solutions while being flexible and expandable to 32-bits, maintaining complete compatibility to RISC-V open-source toolchains.
- A configurable clock-gated 32-bit bus manager that facilitates power management and integration of other IP blocks to the RISC-V core.
- Bus manager includes APB/AHB bus management capabilities.
- HV CMOS GPIO. Our special HV ports can directly manage HV loads (up to 15 V).
SIWA is a licensed product, designed in collaboration with Tecnológico de Costa Rica
Compact and Flexible RISC-V Solutions for Ultra Low Power Applications
SIWA is our line of compact, RISC-V solutions aimed at ultra low power applications (48.31 pJ/cycle @1MHz per core on 0.18 um commercial process for the multicycle version). SIWA is capable of replacing 8 and 16-bit microcontroller solutions while being flexible and expandable to 32-bits, maintaining complete compatibility to RISC-V open-source toolchains
- High performance
- Flexible
- Compatibility