Signal and Power Integrity Analysis

Our team is proficient with modern high-speed and high-frequency challenges in very dense ICs and interconnect systems, considering signal, power and EMI integrity aspects at IC and package level, electromagnetic simulation, as well as advanced characterization and model-to-hardware correlation techniques.

Signal and Power Integrity

Our team’s expertise spans over 15 years’ experience dealing with signal integrity and power integrity challenges. From interconnect design, crosstalk mitigation, impedance matching, via-trace design, and layout best practices; from generation and handling of full-wave or hybrid models, complex S-parameter models, to co-design of signal and power domains to match the most stringent specifications. We are proficient with most used EDA suites including Cadence Sigrity & AWR Studio, Siemens Hyperlynx, Ansys HFSS/SiWave, Keysight ADS, CST Microwave Studio, among others.

High-speed I/O Analysis

Modern interfaces reach multi-Gb/s data rates, requiring co-design of the interconnect channel as well as the IC interface with equalization, multi-level signaling, coding, and multi-domain conversion for guided and RF links working in the electrical, optical, or wireless domains. Our team can help to address those challenges and perform advance analysis with electromagnetic simulation, channel behavioral or AMS simulation, and macro-modeling techniques.

High-frequency modeling and characterization of digital and RF systems

We cover also the model-to-hardware correlation aspects with plenty of experience on high-frequency measurement and characterization techniques: connectorized and microprobe-based assemblies, RF and EMI probing, calibration and de-embedding techniques, spectrum and vector network analysis, time domain reflectometry, high-speed signaling, jitter, and BER analysis.

Sample project

  • Specification definition for a SerDes I/O Analog, embedded I/O, or RF Interface.
  • Component selection, footprint/pin assignment and layout recommendations at IC and/or package levels.
  • Full-wave or hybrid electromagnetic simulation of critical high-frequency nets for analysis and design optimization.
  • PDN and IR-drop analysis, with temperature profiling.
  • I/O channel simulations with eye diagram/BER metrics, equalization, and coding settings. Single-ended, differential of multi-level signaling.
  • Model-to-hardware correlation, testbench development, calibration/de-embedding. High-frequency measurement, characterization, and analysis against simulated and target specifications.